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2ED020I06-FI dual igbt driver ic power managment & drives datasheet, april 2010 never stop thinking. april 2010
edition 2010-04-20 published by infineon technologies ag, am campeon 1-12, d-85579 neubiberg ? infineon 2007. all rights reserved. legal disclaimer the information given in this document shall in no event be rega rded as a guarantee of conditio ns or characteristics. with respect to any examples or hints given he rein, any typical values stated herein an d/or any information regarding the applica- tion of the device, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including withou t limitation, warranties of non-infri ngement of intellectual prope rty rights of any third party. information for further information on technology, delivery terms and condi tions and prices, please contact the nearest infineon technol- ogies office (www.infineon.com). warnings due to technical requirements, component s may contain dangerous substances. for information on the types in question, please contact the nearest in fineon technologies office. infineon technologies components may be used in life-support devices or systems only with the express written approval of infineon technologies, if a failure of such components can r easonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. life support devices or systems are intende d to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. if they fail, it is rea- sonable to assume that the health of th e user or other pers ons may be endangered. for questions on technology, delivery and prices, please contact the infineon offices in germ any or the infineon companies and representatives worldwide: see our webpage at http://ww w.infineon.com/gatedriver 2ED020I06-FI revision history: 2010-04-20 datasheet previous version: page subjects (major changes since last revision)
type ordering code package packaging 2ED020I06-FI pg-dso-18-2 tape&reel 2ED020I06-FI datasheet 3 april 2010 pg-ds o-18-2 dual igbt driver ic 2ED020I06-FI product highlights ? fully opera tional to 650v ? power supply operating range from 14 to 18 v ? gate drive currents of +1 a / ?2 a ? matched propagation delay for both channels ? high dv/dt immunity ? low power consumption features ? floating high side driver ? undervoltage lockout for both channels ?3.3 v and 5 v ttl compatible inputs ? cmos schmitt-triggered inputs with pull-down ? non-inverting inputs ? interlocking inputs ? dedicated shutdown input with pull-up ? rohs compliant
high and low side driver 2ED020I06-FI overview datasheet 4 april 2010 1 overview the 2ED020I06-FI is a high voltage, high spee d power mosfet and igbt driver with interlocking high and low side referenced outputs. the floating high side driver may be supplied directly or by means of a bootst rap diode and capacitor. in addition to the logic input of each driver the 2ED020I06-FI is equipped with a dedicated shutdown input. all logic inputs are compatible with 3.3 v and 5 v ttl. the output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. pr opagation delays are matc hed to simplify use in high frequency applications. both drivers are designed to drive an n-channel power mosfet or igbt which operate up to 650v.
high and low side driver 2ED020I06-FI pin configuration and functionality datasheet 5 april 2010 2 pin configuration and functionality 2.1 pin configuration vsh gndh outl vsl p-dso-18-2 (300 mil) nc nc 2ED020I06-FI gnd outh inl inh gndh sd gndl gnd gnd gnd gnd gnd figure 1 pin configuration (top view) 2.2 pin definitions and functions pin symbol function 1 inh logic input for high side driver 2 inl logic input for low side driver 3 sd logic input for shutdown of both drivers 4 gnd common ground 5 gnd connect to gnd 6 gnd connect to gnd 7 gnd connect to gnd 8 n.c. do not connect, pin must stay open table 1pin description
high and low side driver 2ED020I06-FI pin configuration and functionality datasheet 6 april 2010 9 gnd connect to gnd 10 gnd connect to gnd 11 gndl low side power ground 1) 12 outl low side gate driver output 13 vsl low side supply voltage 14 n.c. (not connected) 15 n.e. (not existing) 16 n.e. (not existing) 17 gndh high side (power) ground 18 vsh high side supply voltage 19 outh high side gate driver output 20 gndh high side (power) ground 1) please note : gndl has to be connected directly to gnd pin symbol function table 1 pin description (cont?d)
high and low side driver 2ED020I06-FI block diagram datasheet 7 april 2010 3block diagram low side high side inh input logic tx rx logic uvlo hs voltage supply uvlo ls voltage supply clt inl gnd vsh outh gndh outl vsl sd 2ED020I06-FI gndl +5v figure 2 block diagram
high and low side driver 2ED020I06-FI functional description datasheet 8 april 2010 4 functional description 4.1 power supply the power supply of both sides, ?vsl? and ?vsh ?, is monitored by an undervoltage lockout block (uvlo) which enables operation of the corresponding side when the supply voltage reaches the ?on? threshol d. afterwards the internal voltage reference and the biasing circuit are enabled. when the supply voltage (vsl, vsh) drops below the ?o ff? threshold, the circuit is disabled. 4.2 logic inputs the logic inputs inh, inl and sd are fed into schmitt-triggers with thresholds compatible to 3.3v and 5v ttl. when sd is enabled (low), inh and inl are disabled. if inh is high (while inl is low), outh is enabled and vice versa. howeve r, if both signals are high, they are internally disabled until one of them gets low again. this is due to the in terlocking logic of the device. see figure 3 (section 4.7). 4.3 gate driver 2ED020I06-FI features two hard-s witching gate drivers with n-ch annel output stages capable to source 1a and to sink 2a peak current. both drivers are equipped wi th active-low-clamping capability. furthermore, they feature a large ground bounce ruggedness in order to compensate ground bounces caused by a turn-off of the driven igbt. 4.4 coreless transformer (clt) in order to enable signal transmission across the isolation barrier between low-side and high-side driver, a transformer based on clt-technology is em ployed. signals, that are to be transmitted, are specially encoded by the transmitter and corre spondingly restored by the receiver. in this way emi due to variations of gndh (dv gndh /dt) or the magnetic flux density (d /dt) can be suppresed.to compensate the ad ditional propagation delay of tr ansmitter, level shifter and receiver, a dedicated propaga tion delay is introduced into the low-side driver.
high and low side driver 2ED020I06-FI functional description datasheet 9 april 2010 4.5 diagrams inh inl /sd outh outl figure 3 input/output timing diagram
high and low side driver 2ED020I06-FI electrical parameters datasheet 10 april 2010 5 electrical parameters 5.1 absolute maximum ratings note: absolute maximum ratings are defined as ratings, which when be ing exceeded may lead to destruction of the integrat ed circuit. unless otherwise not ed all parameters refer to gnd. parameter symbol limit values unit remarks min. max. high side ground gndh ? 650 650 v high side supply voltage vsh ? 0.3 20 v 1) 1) with reference to high side ground gndh. high side gate driver output outh ? 0.3 vsh + 0.3 v 1) low side ground gndl ? 0.3 5.3 v low side supply voltage vsl ? 0.3 20 v 2) 2) with respect to both gnd and gndl. low side gate driver output outl ? 0.3 vsl + 0.3 v 3) 3) with respect to gndl. logic input voltages (inh, inl, sd ) v in ? 0.3 5.3 v high side ground, voltage tr ansient dv gndh /dt ? 50 50 v/ns esd capability v esd ? 2 kv 4) 4) according to eia/jesd22-a114-b (discharging a 100pf capacitor through a 1.5k series resistor). human body model package power disipation @t a = 25c p d ? 1.4 w 5) 5) considering rth(both chips active)=90k/w thermal resistance (both chips active), junction to ambient r thja ? 90 k/w 6) thermal resistance (high side chip), junction to ambient r thja(hs) ? 110 k/w 6) thermal resistance (low side chip), junction to ambient r thja(ls) ? 110 k/w 6) junction temperature t j ? 150 c storage temperature t s ? 55 150 c
high and low side driver 2ED020I06-FI electrical parameters datasheet 11 april 2010 5.2 operating range note: within the operating range the ic ope rates as described in the functional description.unless otherwise note d all parameters refer to gnd. parameter symbol limit values unit remarks min. max. high side ground gndh ? 650 650 v high side supply voltage vsh 14 18 v 1) 1) with reference to high side ground gndh. low side supply voltage vsl 14 18 v 2) 2) with respect to both gnd and gndl. logic input voltages (inh, inl, sd ) v in 0 5 v junction temperature t j ? 40 105 c industrial applications, useful lifetime 87600h junction temperature t j ? 40 125 c other applications, useful lifetime 15000h 5.3 electrical characteristics note: the electrical char acteristics invo lve the spread of values for the supply voltages, load and junction temperature given belo w. typical values represent the median values, which are related to production processes. unless ot herwise noted all volt ages are given with respect to ground (gnd). vsl = vsh ? gndh = 15 v, c l = 1 nf, t a = 25 c. positive c urrents are assumed to be flowing into pins. 6) device soldered to reference pcb without cooling area voltage supply parameter symbol limit values unit test condition min. typ max. high side leakage current i gndh ? 0 ? a gndh = 1.2 kv gndl = 0 v
high and low side driver 2ED020I06-FI electrical parameters datasheet 12 april 2010 high side quiescent supply current i vsh ? 2.4 3.2 ma vsh = 15 v 1) ? 2.3 3.2 ma vsh = 15 v 1) t j = 125 c high side undervoltage lockout, upper threshold v vsh 1) 10.9 12.2 13.5 v high side undervoltage lockout, lower threshold v vsh 1) ? 11.2 ? v high side undervoltage lockout hysteresis ? v vsh 0.7 1 1.3 v low side quiescent supply current i vsl ? 3.9 5.0 ma vsl = 15 v 3.9 5.5 ma vsl = 15 v t j = 125 c low side undervoltage lockout, upper threshold v vsl 10.7 12 13.3 v low side undervoltage lockout, lower threshold v vsl ? 11 ? v low side undervoltage lockout hysteresis ? v vsl 0.7 1 1.3 v 1) with reference to high side ground gndh. logic inputs parameter symbol limit values unit test condition min. typ max. logic ?1? input voltages (inh, inl, sd ) v in 2 ? ? v logic ?0? input voltages (inh, inl, sd ) v in ? ? 0.8 v logic ?1? input currents (inh, inl) i in ? 40 55 a v in = 5 v logic ?0? input currents (inh, inl) i in ? 0 ? a v in = 0 v voltage supply (cont?d) parameter symbol limit values unit test condition min. typ max.
high and low side driver 2ED020I06-FI electrical parameters datasheet 13 april 2010 logic ?1? input currents ( sd ) i in ? 0 ? a v in = 5 v logic ?0? input currents ( sd ) i in ?60 ?40 ? a v in = 0 v gate drivers parameter symbol limit values unit test condition min. typ max. high side high level output voltag e v vsh ? v outh ? 1.4 1.7 v i outh = ?1ma v inh = 5v high side low level output voltag e v outh 1) 1) with reference to high side ground gndh. ? ? 0.1 v i outh = 1ma v inh = 0v low side high level output voltag e v vsl ? v outl ? 1.4 1.7 v i outl = ?1ma v inl = 5v low side low level output voltag e v outl ? ? 0.1 v i outl = 1ma v inl = 0v output high peak current (outl, outh) i out ? ? ? 1 a v in = 5 v v out = 0 v output low peak current (outl, outh) i out 2 ? ? a v in = 0 v v out = 15 v high side active low clamping v outh 1) ? 2.6 3 v inh =0v, vsh open i outh =200ma ? 2.7 3.2 v inh =0v, vsh open i outh =200ma t j = 125 c low side active low clamping v outl ? 2.6 3 v inl =0v, vsl open i outl =200ma ? 2.7 3.2 v inl =0v, vsl open i outl =200ma t j = 125 c logic inputs (cont?d) parameter symbol limit values unit test condition min. typ max.
dynamic characteristics parameter symbol limit values unit test condition min. typ max. turn-on propagation delay t on ? 85 105 ns gndh = 0 v 20% v out ? 95 120 ns gndh = 0 v 20% v out t j = 125 c turn-off propagation delay t off ? 85 115 ns 80% v out ? 100 130 ns 80% v out t j = 125 c shutdown propagation delay t sd ? 85 115 ns 80% v out ? 100 130 ns 80% v out t j = 125 c turn-on rise time t r ? 20 40 ns 20% to 80% v out ? 30 50 ns 20% to 80% v out t j = 125 c turn-off fall time t f ? 20 35 ns 80% to 20% v out ? 25 40 ns 80% to 20% v out t j = 125 c delay mismatch (high & lo w side turn-on/off) t ? 15 25 ns t j = 25c see figure 6 ? 15 30 ns t j = 125c see figure 6 minimum turn-on input (inh, inl) pulse width t pon ? 50 75 ns 1) 1) inh-pulses shorter than the ?minimum turn-on(off) input pulse width? are prolonged to 50ns (see figure 7 ). inl-input doesnt have this feature. ? 55 80 ns 1) t j = 125c minimum turn-off input (inh, inl) pulse width t poff ? 50 75 ns 1) ? 55 80 ns 1) t j = 125 c high and low side driver 2ED020I06-FI electrical parameters datasheet 14 april 2010
high and low side driver 2ED020I06-FI package outline datasheet 15 april 2010 6 package outline note: dimensions are given in mm. 6.1 soldering profile the soldering profile qualified for 2ED020I06-FI (according to the standard ipc/jedec j-std- 020c) is moisture sensitivity level 3. the peak reflow temperature for its package (volume < 350 mm 3 ) is 260 +0/-5 c.
high and low side driver 2ED020I06-FI diagrams datasheet 16 april 2010 7 diagrams 2v 0.8v 80% 80% 20% 20% inh/l outh/l t r t f t on t off figure 4 switching time waveform definition /sd outh/l t sd 0.8v 80% figure 5 shutdown waveform definition
inl inh outl outh 2v 0.8v 2v 0.8v 80% 80% 20% 20% t offl t onh t offh t onl high and low side driver 2ED020I06-FI diagrams datasheet 17 april 2010 t = max (|t onh - t offl | , |t offh - t onl |) figure 6 delay matching wa vefo rm definitions inh outh 50ns 50ns figure 7 short inh-pulses prolongation
high and low side driver 2ED020I06-FI application advices datasheet 18 april 2010 8 application advices 8.1 power supply a) the connection of a capacitor (>10nf) as close as possible to the supply pins vsh, vsl is recommended for avoiding that pos sible oscillations in the suppl y voltage can cause erroneous operation of the output driver stage. total value of capacitance connected to the supply terminals has to be determined by taking in to account gatecharge, peak cu rrent, supply voltage and kind of power supply. b) if a bootstrap power supply for the high si de driver is applied, a resistor of 10 ? minimum in series with the bootstr ap diode is required.
high and low side driver 2ED020I06-FI application advices datasheet 19 april 2010
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